Papers for Supplemental Reading
A list of papers that serve as supplemental reading for this course. Students are required to submit a paper summary to Gradescope for each of the assigned papers.
Technology/History
Paper #1
Robert P. Colwell, Charles Y. Hitchcock III, E. Douglas Jensen, H. M. Brinkley Sprunt, and Charles P. Kollar, “Instruction Sets and Beyond: Computers, Complexity, and Controversy,” in IEEE Computer, vol. 18, no. 9, pp. 8–19, September 1985.
Paper #2
Trevor Mudge, “Power: A First-Class Architectural Design Constraint,” in IEEE Computer, vol. 34, no. 4, pp. 52–58, April 2001.
Processor/Pipelining
Paper #3
Subbarao Palacharla, Norman P. Jouppi, and J. E. Smith, “Complexity-Effective Superscalar Processors,” in Proceedings of the International Symposium on Computer Architecture (ISCA), June 1997.
Paper #4
Srikanth T. Srinivasan, Ravi Rajwar, Haitham Akkary, Amit Gandhi, and Mike Upton, “Continual Flow Pipelines,” in Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 2004.
Caches
Paper #5
Norman P. Jouppi, “Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers,” in Proceedings of the International Symposium on Computer Architecture (ISCA), May 1990.
Paper #6
Changkyu Kim, Doug Burger, and Stephen W. Keckler, “An Adaptive, Non-Uniform Cache Structure for Wire-Delay Dominated On-Chip Caches,” in Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 2002.
Domain-Specific Architectures
Paper #7
Parthasarathy Ranganathan, Daniel Stodolsky, Jeff Calow, Jeremy Dorfman, Marisabel Guevara, Clinton Wills Smullen IV, Aki Kuusela, et al., “Warehouse-Scale Video Acceleration: Co-Design and Deployment in the Wild,” in Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), April 2021.
Multithreading
Paper #8
Dean M. Tullsen, Susan J. Eggers, and Hank M. Levy, “Simultaneous Multithreading: Maximizing On-Chip Parallelism,” in Proceedings of the International Symposium on Computer Architecture (ISCA), June 1995.
Multicore/Multiprocessor
Paper #9
Rakesh Kumar, Dean M. Tullsen, Parthasarathy Ranganathan, Norman P. Jouppi, and Keith I. Farkas, “Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance,” in Proceedings of the International Symposium on Computer Architecture (ISCA), June 2004.
Security
Paper #10
Mark D. Hill, Jon Masters, Parthasarathy Ranganathan, Paul Turner, and John L. Hennessy, “On the Spectre and Meltdown Processor Security Vulnerabilities,” in IEEE Micro, vol. 39, no. 2, pp. 9–19, February 2019.
Paper #11
Yao Hsiao, Nikos Nikoleris, Artem Khyzha, Dominic P. Mulligan, Gustavo Petri, Christopher W. Fletcher, and Caroline Trippel, “RTL2MuPATH: Multi-uPATH Synthesis with Applications to Hardware Security Verification,” in Proceedings of the International Symposium on Microarchitecture (MICRO), November 2024.
Warehouse Scale Computers
Paper #12
Luiz André Barroso and Urs Hölzle, “The Case for Energy-Proportional Computing,” in IEEE Computer, vol. 40, no. 12, pp. 33–37, December 2007.
Sustainability
Paper #13
Carole-Jean Wu, Ramya Raghavendra, Udit Gupta, Bilge Acun, Newsha Ardalani, Kiwan Maeng, Gloria Chang, Fiona Aga Behram, James Huang, Charles Bai, Michael Gschwind, Anurag Gupta, Myle Ott, Anastasia Melnikov, Salvatore Candido, David Brooks, Geeta Chauhan, Benjamin Lee, Hsien-Hsin S. Lee, Bugra Akyildiz, Maximilian Balandat, Joe Spisak, Ravi Jain, Mike Rabbat, and Kim Hazelwood, “Sustainable AI: Environmental Implications, Challenges and Opportunities,” in Proceedings of the Conference on Machine Learning and Systems (MYSys), August 2022.