Papers for Supplemental Reading
A list of papers that serve as supplemental reading for this course. Students are required to submit a paper summary for each of the assigned papers.
Technology/History
Paper #1
Robert P. Colwell, Charles Y. Hitchcock III, E. Douglas Jensen, H. M. Brinkley Sprunt, and Charles P. Kollar, “Instruction Sets and Beyond: Computers, Complexity, and Controversy,” in IEEE Computer, vol. 18, no. 9, pp. 8–19, September 1985.
Paper Optional
Gene M. Amdahl, “Validity of the Single Processor Approach to Achieving Large Computing Capabilities.”
Paper Optional
Mark Bohr, “A 30 Year Retrospective on Dennard’s MOSFET Scaling Paper.”
Branch Prediction
Paper #2
Tse-Yu Yeh and Yale N. Patt, “Two-Level Adaptive Training Branch Prediction,” in International Symposium on Microarchitecture (MICRO), 1991.
Paper Optional
James E. Smith, “A Study of Branch Prediction Strategies,” in International Symposium on Computer Architecture (ISCA), 1981.
Paper Optional
Scott McFarling, “Combining Branch Predictors (GShare and Tournament Predictors),” in Western Research Lab Technical Note, TN-36, 1999.
Paper Optional
Daniel A. Jimenez and Calvin Lin, “Dynamic Branch Prediction with Perceptrons,” in *Proceedings of the International Symposium on High-Performance Computer Architecture (HPCA)”, January 2001.
Superscalar
Paper #3
J. E. Smith and Gurindar S. Sohi, “The Microarchitecture of Superscalar Processors,” in Proceedings of the IEEE, Volume 83, No. 12, 1609-1624, December 1995.
Paper Optional
Subbarao Palacharla, Norman P. Jouppi, and J. E. Smith, “Complexity-Effective Superscalar Processors,” in Proceedings of the International Symposium on Computer Architecture (ISCA), June 1997.
Static Instruction Level Parallelism
Paper #4
Eric Rotenberg, Steve Bennett, and James E. Smith, “Trace Cache: a Low Latency Approach to High Bandwidth Instruction Fetching,” in International Symposium on Microarchitecture (MICRO), 1996.
Paper #5
Michael S. Schlansker and B. Ramakrishna Rau, “EPIC: Explicitly Parallel Instruction Computing,” in IEEE Computer, vol. 33, no. 2, pp. 37–45, February 2000.