As traditional hardware scaling comes to an end, hardware specialization is increasingly necessary to satisfy the computing demands of modern applications. However, developing and evaluating hardware accelerators is a challenging task when compared to developing software. High-level synthesis promises one avenue for achieving highly productive hardware accelerator development. However, current high-level tools leave much to be desired in resultant system performance and energy-efficiency.
This project aims to significantly simplify the design and deployment of accelerated systems, making it almost as easy to design hardware as it is to write software.