This course is a graduate-level seminar in computer architecture with special topics in hardware acceleration. This course surveys the landscape of hardware acceleration from historical contexts to recent trends in system designs spanning a collection of architectural techniques (e.g. stream processing, dataflow architecture, parallelism applied to acceleration) and a variety of application domains (e.g. GPU, ML, Database, Graph, Genomics). This course also covers the taxonomy of accelerators, the hardware-software co-design of accelerators, and the deployment of accelerators using the AWS cloud.
The goal of the course is to provide an essential background in architectural concepts that are applicable to accelerator designs, survey the latest trends in accelerated systems, and introduce an example simple hardware design flow from conceptualizing an accelerator architecture, specifying the accelerator in Chisel, to deploying it on an AWS EC2 F1 instance (FPGAs-in-the-cloud).
Students are expected to read the assigned papers (about 3 papers a week), provide written reviews/discussion questions for the papers, participate in the paper discussions in class, prepare four lectures on four papers of choice throughout the semester, complete three labs to familiarize themselves with Chisel and the accelerator deployment infrastructure, and complete a course project of a hardware accelerated system (one to two students per project). The success of the project will be measured in a project proposal checkpoint, end-of-semester poster presentation, a CAL (Computer Architecture Letters)-style written report, and a demo of the accelerator deployed on the AWS Cloud.
Spring 2021 Mondays and Wednesdays 3:30-4:45pm
Lisa Wu Wills
Office Hour Wednesdays 4:45-5:45pm or by appointment
Office Hour Tuesdays/Thursdays 10:00-11:30am
Computer Architecture (e.g. CS/ECE 250 or CS 550/ECE 552) and Digital Logic Design (e.g. CS/ECE 350 or ECE 550) or consent of instructor
CS/ECE 590 Spring 2021 Sakai Website is a supplement to the main course website for posting lecture slides, paper/project presentations, lab assignments, Piazza, and your gradebook.
CS/ECE 590 Past Class Projects website contains brief overviews and results of previous accelerated systems completed by students in this course to serve as an inspiration and example for your projects.
Sign Up Sheets
Chisel Related Resources
Course schedule is tentative and subject to change. Send email to Professor Wills if you have paper suggestions.
Historical Evolution of Hardware Accelerators
Jan 25 · 27
Feb 1 · 3
Accelerator Taxonomy and Integration
Feb 8 · 10
Accelerated System Performance
● (Optional) Gables: A Roofline Model for Mobile SoCs
Feb 15 · 17
Feb 22 · 24
Parallelism and Efficiency
Project Proposal Checkpoint
Mar 3 · 8
Domain Specific Accelerators: GPU
Mar 17 · 22
Domain Specific Accelerators: Machine Learning
Mar 24 · 29
Domain Specific Accelerators: NLP, Database Analytics, Robotics
Mar 31 · Apr 5
Domain Specific Languages and Compilers, Reconfigurable Architectures, Accelerator Modeling Framework
Apr 7 · 14
Domain Specific Accelerators: Graph Analytics, Genomics Analytics, Processing-in-Memory
Poster Session and Demo